i-BRAIN – Institute for Brain Research Advanced Interfaces and Neurotechnologies - is a highly-interdisciplinary research institute focused on developing transformative brain-computer interfaces (BCIs) that blur the distinction between electronics and the brain. Founded by world-renowned scientist Prof. Charles Lieber, i-BRAIN will enable groundbreaking research to understand the brain and brain diseases as well as breakthrough technologies for treatment of neurological and neurodegenerative diseases for the near-term but also enable future advances and treatments that today may be considered the realm of science fiction. Additionally, i-BRAIN will instill a positive and highly interdisciplinary culture in the training of young scientists, engineers and doctors such that they are prepared to lead the development of science and engineering as well as the translation of ideas into commercial technologies that benefit present and future generations!

Position: CMOS IC MEA & Backend System Design Team Lead

Location: i-BRAIN, Shenzhen

Employment Type: Full-time

Position Overview

We are seeking experienced and highly motivated full-time personnel to support the design of ultra–high-channel-count neural recording systems for flexible brain–computer interface (BCI) platforms. These roles span CMOS IC design and backend electronics through system integration, enabling scalable whole-brain neural interfaces for preclinical and clinical research.

The successful candidate(s) will lead and define CMOS IC MEA chip architecture and backend acquisition, synchronization, and data transport subsystems, coordinating design decisions across IC, backend electronics, and system architecture at i-BRAIN.

Position 1. CMOS IC MEA Design Lead

(Full-time, i-BRAIN, Shenzhen)

Core Responsibilities

1. Lead architecture and design of high-channel-count CMOS MEA recording and stimulation chips.

2. Define long-term IC architecture, technology roadmaps, and scalability strategies for next-generation neural interfaces

3. Design low-noise, low-power analog front ends for neural recording.

4. Define scalable readout architectures for ultra-high channel-count systems.

5. Coordinate IC design decisions with system-level constraints including signal integrity, power, bandwidth, and thermal limits.

6. Lead full IC development cycles, including schematic design, layout oversight, verification, tape-out, and foundry engagement.

Qualifications & Requirements

1. MS or PhD in Electrical Engineering, Microelectronics, or related field.

2. Strong background in analog and mixed-signal IC design.

3. Experience with large-scale ADCs, on-chip signal processing, and large-scale sensor interfaces.

4. Multiple successful silicon tape-outs with demonstrated ownership of key blocks or full-chip architecture.

5. Ability to work full time and closely with an interdisciplinary team.

Position 2. Backend & System Architect

(Full-time, i-BRAIN, Shenzhen)

Core Responsibilities

1. Define and develop backend electronics and system-level architecture for large-scale neural recording systems.

2. Design data acquisition, synchronization, and high-speed data transport systems.

3. Lead system bring-up, debugging, and performance validation.

4. Coordinate integration across chip, board, and system levels.

5. Work with external vendors on PCB fabrication, assembly, and testing.

Qualifications & Requirements

1. MS or PhD in Electrical Engineering or related field.

2. Strong experience with designing and delivering complex backend electronics or data acquisition systems

3. Familiarity with high-speed interfaces, clocking, and synchronization.

4. Experience with FPGA or SoC-based systems is a plus.

5. Ability to work full time and drive system-level execution and end-to-end delivery.

Why Join i-BRAIN

1. First-of-a-Kind Challenges – Work on ultra-high-channel-count neural interfaces at a scale few teams in the world can address.

2. End-to-End Impact – See designs progress from concept to silicon, hardware platforms, and deployed research and clinical systems.

3. Strong Institutional Backing – Long-term vision, stable support, and access to advanced fabrication and system resources.

4. Senior-Level Autonomy – A role suited for principal-level engineers who value influence, trust, and technical depth.

5. Team and Legacy Building – Opportunity to mentor, set technical standards, and help build a world-class engineering team.

6. Competitive Compensation – Senior-level salary and benefits, commensurate with experience.

please provide the following materials in English:

1) CV.

2) Other materials that can illustrate capabilities.

Please send the above materials in PDF format and the applicant's self-introduction to ibrain@smart.org.cn.(The subject of the email: name + Position applied).